17/3/2014
82
dlx-sync-layout
Synchronous RTL
=
dlx-sync-layout
Synchronous
Desynchronized
Cycle:    4.4ns
Power:   70.9mW
Area:   372,656mm
Cycle:    4.45ns
Power:   71.2mW
Area:   378,058mm
*All numbers are after Placement & Routing
*Total of 1500 flip-flops, 3000 latches
*DE-SYNC design includes 5 controllers, each driving 2 clock trees
*Power numbers include the clock tree
*Technology: UCM/Virtual Silicon 0.18 µm
CE-653 - De-Synchronisation Methodology