13-Value coupled with Timing
CE-653 - Hazards and Analysis Methods
31
}At fanout points:
}Different gate delays è different group ids for same input transition at fanout
}In RHS example:
}Relative order between outputs of NAND, AND not guaranteed
}Outputs assigned new group ids i2, i3
}Timing is incremented by 1
}Not necessarily by actual gate delay
maintaining-timestamps.jpg
18/3/2014