D-Type FF – inferring MSFSM model
}
We split the D-type FF
circuit into 3 separate sub-
circuits
(SR latches)
}
Infer an FSM of each sub-
circuit
}
Signals and states
will
transition asynchronously
}
Goal:
}
Signals
x
b
, y
may
never assume 00,
OR
}
may never transition
from 00
à
11
7
CE-653 - MSFSM Intuitive Example