Asynchronous Indicating Logic (Data-dependent logic with Completion Detection)

NCL Flow Detailed Example – Step 4

20/4/2014

CE-653 - Indicating Logic

25

}Naive semi-static DIMS implementation – 114 transistors - may be reduced to 63 transistors by merging C-elements with OR-gates - versus 14 for a synchronous circuit

}

a

s

b

x

y

z

b.f

a.t

b.t

D-R

NAND

D-R

NAND

D-R

NAND

x.t

s.f

a.f

x.f

y.t

y.f

z.t

z.f

s.t