STG Based Logic Synthesis - the Petrify Approach

STG for the READ cycle

CE-653 - STG-based Logic Synthesis - Petrify

18

LDS+

LDTACK+

D+

DTACK+

DSr-

D-

DTACK-

LDS-

LDTACK-

DSr+

LDS

LDTACK

D

DSr

DTACK

VME Bus

Controller