Asynchronous Challenges
CE-653 - Introduction and Fundamentals
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}Lack of CAD tools
}Limited support from major EDA companies
}Asynchronous EDA start-up environment challenging
}High-performance asynchronous design
}Some blocks can be 2-5x larger due to dual-rail design
}May consume more peak power than desired
}Low-power asynchronous design
}Can be slower than desired if control overhead not managed
}Debug
}Circuit can’t be slowed via clock to aid in debugging
}Asynchronous test
}Testers geared toward synchronous
}Standards do not exist and test methodologies still evolving
}Automatic test pattern generation in infancy