}Synchronous Circuits
}Clock: up to 50% of chip power
}Particularly for high-performance designs
}Hazards: up to 70% of computation power
}For very unbalanced logic; typically much smaller
}Datapath
}Elements expend energy in every clock
}Clock gating can help here
}Asynchronous Circuits
+No global clock
+Only expend energy in datapath element when used
+Perfect gated
clocking
+Can turn data slices
off
Handshaking circuitry has power overhead
Some types of designs have high switching activity