CE653 - Introduction

Domino Logic

CE-653 - Introduction and Fundamentals

}Combines (Latch + Logic function) --less area

}Eliminates P-Network, PMOS is usually 2-3x larger than NMOS

}Equivalent functions have less load capacitance

}Equivalent functions are faster

}Allows for much more logic complexity with less latency (and energy)

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	Domino Logic combines the latch and the logic, eliminates the p-network: smaller, faster, less power (despite return-to-zero behavior)