The De-facto
Standard:
Synchronous Design Abstraction
Synchronous Design Abstraction
CE-653 - Introduction and
Fundamentals
22
}Flip-flops (aka registers/latches)
}Memory elements that store “state” of
system
}Combinational Logic
}Performs logical functions on data
(e.g., add, mult, etc…)
}Clock
}Periodic square wave that controls
update of memory elements
}Assume data is stable upon latching of
data
Combinational
Logic
FF/Latch
Clk
DataIn
DataOut