Line Roughness
CE-653 - Introduction and Fundamentals
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}
H.W. Kim, et al, “Experimental Investigation of the Impact of LWR on Sub-100-nm
Device Performance”, IEEE Trans. Electron Device, vol 51, no 12, 2004
poly-gate region
LER: Line Edge Roughness, LWR: Line Width Roughness (3 sigma of the width)
Vth decreases with CD but variation is increasing
